1. Field of the invention
The present invention relates to a system and method for implementing a plurality of logic functions on a single microchip, and in particular to an implementation of separate logic circuits on a single microchip wherein the separate logic circuits share input and output pins without the use of multiplexing logic such that the microprocessor is capable of assuming the properties of the desired logic function.
2. Description of the Related Art
Microprocessors commonly use multiple logic circuits to perform a variety of tasks. Feature sizes are constantly getting smaller and smaller, thereby allowing more and more logic elements to be implemented on a silicon wafer, or the equivalent, of a given size. However, the need to provide external interfaces to the microprocessor via input and output pins is a constraint on the lower limit of microprocessor size. Many complicated logic circuits are xe2x80x9cpin-intensive,xe2x80x9d requiring large numbers of input and/or output pins, easily numbering in the hundreds or more. Consequently, as more and more logic circuits are implemented within a single microprocessor, there is an increased need to reduce the pin count, and thus reduce the size of the microprocessor packaging. Towards this end, multiplexing logic is commonly used to multiplex signals to or from the input/output pins from one or more of the logic circuits within the microprocessor.
One problem with multiplexing logic is that the depth of the structure of the logic gates required to implement a traditional on-chip multiplexer increases with each input or output pin being multiplexed. In other words, the number of layers of multiplexing logic increases in proportion to the number of pins being multiplexed. In addition, the multiplexer logic draws power like any other logic circuit. Further, it can take multiple clock cycles to multiplex numerous inputs and outputs. Consequently, microchip power consumption and performance characteristics are degraded by the use of multiplexing logic. Therefore, what is needed is a system and method for allowing the sharing of input and output pins among a plurality of logic circuits without the need to use additional multiplexing logic.
To overcome the limitations in the related art described above, and to overcome other limitations that will become apparent upon reading and understanding the present application, the present invention is embodied in a system and method for sharing input and output pins between a plurality of separate logic circuits coexisting within a single microprocessor such that the microprocessor is capable of assuming the properties of one or more desired logic circuits.
The system and method of the present invention achieves controlled sharing of input and output pins without the requirement to use multiplexing logic. Further, each of the shared pins within the microprocessor is preferably bi-directional, such that they may be used as either input or output pins for one or more of the plurality of logic circuits within the microprocessor. Because the pins may be shared among a plurality of logic circuits, a single microchip may be used for completely different purposes by enabling or disabling selected logic circuits. In other words, a single microchip can take on any number of properties by simply enabling one or more logic circuits while disabling others.
Because the number of logic gates possible within a single microprocessor has increased exponentially over the years, large numbers of separate logic circuits may be designed into a single microprocessor without a significant increase in cost. Such a design allows for a reduction in the number of unique parts in a system, with a corresponding reduction in system cost.
In general, one or more logic circuits are enabled by a control signal. Inverting the enabling control signal preferably disables logic circuits using the same pins as the enabled circuit or circuits. In this manner, interference between logic circuits is avoided. In addition, because unused logic circuits are preferably disabled, the power requirements of a multi-circuit processor designed in accordance with the present invention are reduced. Further, since the need for multiplexing logic required to address one of a plurality of logic circuits from a single pin has been eliminated, the performance of enabled logic circuits is substantially increased over comparable logic circuits that use multiplexing logic to arbitrate between various logic circuits.
Specifically, the present invention uses a series of latches or logic gates, such as, for example a tri-state driver paired with a receiver device, or the equivalent, to enable or disable specific logic circuits. Further, because each of the shared pins is preferably implemented as a bi-directional signal, the same tri-state driver/receiver preferably allows specific pins to be used as either an input or an output pin. One tri-state driver/receiver is preferably used for each shared pin. A single control signal is input either directly or via an inverter to each of the tri-state drivers/receivers to enable or disable specific logic circuits, and to allow shared pins to act as either an input or an output for the desired logic circuit.
For example, the memory subsystem in a computer may use separate logic circuits to provide an address status and an address response function. Typically these functions are implemented on separate microprocessor chips because they are both pin-intensive, and require very fast performance. Implementing both functions on a single microprocessor using unique pins is possible, but the increase in size required to house the necessary pins reduces the utility of such a configuration. Further, the use of multiplexing logic to reduce the number of pins is undesirable in such a case because the performance of such functions would be substantially degraded by the use of multiplexing logic. However, a multi-property microprocessor designed in accordance with the present invention could act as either an address status or an address response collection unit by simply enabling either of the two logic circuits while disabling the other. Such a microprocessor would allow the use of two identical parts, either of which could take on the properties of the desired function, thereby reducing system cost when compared to an equivalent implementation that uses two unique parts.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings wherein like reference numbers represent like parts of the invention.